In general, an AC type plasma display panel is a display element which exhibits luminance by generating a gas discharge inside cells. The plasma display panel is classified into an AC type and a DC type in accordance with a discharge type. As the AC-type plasma display panel, an AC three-electrode surface discharge plasma display panel having three electrodes is widely used.
The general AC three-electrode surface discharge plasma display panel controls luminance by inducing a reliable discharge of a cell in accordance with a voltage applied from the outside of the cell. In a driving waveform of such a plasma display panel, an address display separation (ADS) driving type with ramp-reset is used. In the ADS driving type, in order to realize one image, one frame is divided into plural subfields having different number of sustain pulses, and each of the subfields is divided into three periods, that is, a reset period, an address period, and a sustain period. The reset period is a period during which a uniform wall charge suitable for discharge conditions of all cells of the plasma display panel with respect to an external application voltage is adjusted to be maintained in order to induce a stable address discharge in the address period. The address period is a period during which a cell to be discharged or not to be discharged in the sustain period is divided in such a manner that all cells are subjected to an address discharge by sequentially applying a scan pulse to numerous scan electrodes Y and applying a data voltage Vd to the address electrode A. At this time, the wall charge of the cell to be discharged changes greatly, and hence a condition is satisfied in which the sustain discharge is maintained in the sustain period. The sustain period is a period during which the sustain discharge of the cell selected as the cell to be discharged in the address period is continued by alternately applying the high sustain voltage Vsus to the scan electrode Y and the sustain electrode X.
FIG. 1 is a waveform diagram showing a general driving waveform of an AC type plasma display panel, and FIG. 2 is a circuit diagram showing a switching circuit of a general scan electrode driving circuit for realizing a scan electrode driving waveform.
The operations of the reset period, the address period, and the sustain period will be described with reference to FIGS. 1 and 2. First, in the reset period, a ground (GND) voltage is applied as the driving voltage of scan electrode so that fourth, fifth, and sixth switches SW4, SW5, and SW6 and eleventh and thirteenth switches SW11 and SW13 (SC2) of a switching circuit 20 in a scan electrode driving circuit (not shown) are turned on. Subsequently, in a ramp-up period, in order to increase the ground voltage up to the sustain voltage Vsus, the fourth switch SW4 is turned off and the first and third switches SW1 and SW3 are sequentially turned on. Subsequently, in order to increase the sustain voltage Vsus up to a voltage Vyr with a slope, the fifth switch SW5 is turned off and the seventh switch SW7 is turned on so as to operate a ramp-up switch, thereby generating a voltage waveform having a slope. Subsequently, in order to decrease the voltage Vyr down to the sustain voltage Vsus again, the seventh switch SW7 is turned off and the fifth switch SW5 is turned on so as to output the sustain voltage Vsus to the scan electrode Y. Subsequently, in a ramp-down period, the sixth switch SW6 is turned off and the eighth switch SW8 is turned on so as to gradually decrease down to the scan voltage Vsc.
Subsequently, in the address period, the eleventh and thirteenth switches SW11 and SW13 (SC2) are turned off, the tenth and twelfth switches SW10 and SW12 (SC1) are turned on so as to apply the voltage Vyl (the voltage at the point D in FIG. 2) to all cells in a panel (not shown), and the ninth switch SW9 is turned on. At a scan IC, a voltage Vcc is the voltage Vyl (the voltage at the point D in FIG. 2), and the ground voltage becomes the scan voltage Vsc through the point C in FIG. 2 and the eighth switch SW8 as the ramp-down element, which forms a more reliable path compared with the case of the address discharge. Subsequently, when the scan IC is driven, one of the voltage at the point C, which is the ground voltage of the scan IC, and the voltage at the point D, which is Vcc, is selected.
Subsequently, in the sustain period, the sustain voltage Vsus and the ground (GND) voltage of 0 V are sequentially applied so as to output the sustain voltage Vsus to the scan electrode Y through the third, fifth, sixth, and thirteenth switches SW3, SW5, SW6, and SW13 and to electrically connect the ground (GND) voltage to the scan electrode Y through the fourth, fifth, sixth, and thirteenth switches SW4, SW5, SW6, and SW13. Here, the first and second switches SW1 and SW2 are temporarily turned on and off at the time points at which the sustain voltage Vsus is applied, increased, and decreased so that the non-discharge power supplied to the panel is recovered and supplied to the circuit again. Accordingly, the first and second switches SW1 and SW2 are used as a circuit of energy recovery for improving the energy consumption.
In general, in a mass production of the AC type plasma display panel, the panel exhibits various characteristics, and the ramp-down slope shown in FIG. 1 needs to be changed in some cases. In the foregoing description, at the time point when the ramp-down period ends, the voltage Vyl shown in FIG. 1 and the voltage Vcc of the scan IC at the point D in FIG. 2 are applied to all cells. At this time, the eleventh and thirteenth switches SW11 and SW13 (SC2) are turned off, and the tenth and twelfth switches SW10 and SW12 (SC1) are turned on. Such a switching is controlled by a logic control circuit (not shown).
Accordingly, the output of the scan electrode may be shown as FIGS. 3a, 3b, and 3c in accordance with the ramp-down slope. That is, the first, second, third elapse time periods t1, t2, and t3 between the end time point of ramp-down discharge t0 and the time when a first scan pulse is applied are different from each other. In the case of FIG. 3c, since the third elapse time period t3 is longer than those of the first and second elapse time periods t1 and t2, priming particles created by the ramp-down discharge gradually vanish. Subsequently, the amount of the priming particles to be used in the address discharge decreases, which is disadvantageous in the address discharge.
In order to avoid the disadvantage, another method for driving the AC type plasma display panel has been proposed. The driving method will be described with reference to FIGS. 2, 4, and 5. A comparator 41 in a scan electrode driving circuit 40 compares an output voltage Y3 of the scan electrode when a scan voltage Y2 of a switching circuit 20 in the scan electrode driving circuit 40 is ramped down to a reference voltage Vsc. When the ramp-down is continued and the output voltage Y3 of the scan electrode is equal to the scan voltage Y2, the comparator 41 compares the output voltage Y3 with the scan voltage Y2, and uses the output signal as the control signal for controlling the tenth, eleventh, twelfth, and thirteenth switches 10, 11, 12, and 13 SW10, SW11, SW12, and SW13. Accordingly, the eleventh and thirteenth switches SW11 and SW13 are turned off, and the tenth and twelfth switches SW10 and SW12 are turned on so as to apply the voltage Vyl in FIG. 1 to all cells in the panel.
The output waveform of the scan electrode in this case is shown in FIG. 5. When the voltage of the scan electrode is changed in the positive direction faster as compared to the end time point of ramp-down discharge, some of negatively charged particles among the charged priming particles move toward the scan electrode, and some of positively charged particles move toward the sustain electrode or the address electrode during the ramp-down discharge. Subsequently, since the scan electrode is used as the negative electrode and the sustain electrode and the address electrode are used as the positive electrode upon performing the address discharge, the movement of the particles is advantageous in the address discharge. However, even when the voltage Vyl is promptly applied in accordance with a variation in the ramp-down slope, since the first, second, and third elapse time periods t11, t12, and t13 between the end time point of ramp-down t0 and the time when a first scan pulse is applied are different from each other as shown in FIGS. 5a, 5b, and 5c, but since the time when a first scan pulse is applied are constant as seen in FIGS. 3a, 3b, and 3c, the priming particles remaining in space inevitably vanish except for the particles formed by the wall charge during the elapse time period until the time when a first scan pulse is applied. Accordingly, in the cases of FIGS. 5b and 5c, as described in the case of FIG. 3c, the amount of the priming particles used in the address discharge decreases, which is disadvantageous in the address discharge.
As described, in the address period, since the conditions such as the amount of the priming particles or the formation of the wall charge caused by the discharge in the preceding reset period largely influence the discharge condition in the address period, it is necessary to further smoothly generate the address discharge by maximally utilizing the priming particles when performing the address discharge.